DMA is a fast data exchange mode. Direct data transmission between an external device and a memory can be completed in a DMA mode without using a central processing unit (CPU) and CPU intervention. In a DMA mode, the CPU only needs to deliver an instruction to a DMA transmission control apparatus in order to instruct the DMA transmission control apparatus to process data transmission. After completing data transmission, the DMA transmission control apparatus feeds back information that the transmission is ended to the CPU. In this way, a CPU resource occupancy rate is greatly reduced and system resources can be greatly saved. The DMA transmission control apparatus performs data transmission using a DMA channel. The DMA channel is provided with an input queue and an output queue, and both the input queue and the output queue include a series of parameter registers configured to record transmission parameters (such as size of to-be-transmitted data, a destination address, a source address, and a transmission progress), to-be-transmitted data, and the like of a target DMA task. For example, to transmit a data block of the external device to the memory, the DMA transmission control apparatus inputs a to-be-transmitted data block using the input queue of the DMA channel, and then outputs the data block to the external device using the output queue of the DMA channel in order to complete data transmission. The CPU may execute another task in a process in which the DMA transmission control apparatus performs data transmission. Therefore, processing efficiency of a computer system is improved.
However, an existing DMA transmission control apparatus is merely used as a hardware unit that is responsible for data transmission and executes DMA tasks according to an input time sequence of the tasks. In a transmission process in which DMA tasks with different priorities exist and even an urgent DMA task exists, a DMA task with a higher priority or the urgent DMA task cannot be processed until a DMA task whose sequence is prior to the DMA task with a higher priority or the urgent DMA task is processed. Therefore, a data transmission sequence cannot be adjusted according to actual importance degrees of tasks in a conventional DMA technology. As a result, processing efficiency and service quality of the computer system are reduced.